vmnop   Description Syntax Examples Keyword Links Instruction Type Argument Types Virtual Machine Instructions AIS Component Systems

When evaluated, this vm instruction causes the AIS Lisp compiler to generate no code whatsoever. Issuing a (vmnop) instruction causes the AIS Lisp compiler to issue no Assembler instructions. Issuing a vmnop instruction acts a a no operation command to the compiler. The vmnop instruction is a compiler directive only and is never generated in the Lambda pcode vector.

(vmnop)

Here are a number of links to Lambda coding examples which contain this instruction in various use cases.

s

Here are a number of links to this instruction by related keywords.

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Here are a number of links to this instructions of this same type.

vmadd	vmaddi	vmaddn	vmand
vmapply	vmargcount	vmargfetch	vmcadd
vmcall	vmcallarg	vmcdiv	vmcmul
vmcsub	vmdebugger	vmdiv	vmdivi
vmdivn	vmdivr	vmdivri	vmiadd
vmiand	vmiandb	vmidiv	vmidivr
vmimul	vmior	vmiorb	vmisub
vmixor	vmixorb	vmjump	vmjumpcc
vmmove	vmmovei	vmmoven	vmmul
vmmuli	vmmuln	vmnadd	vmndiv
vmndivr	vmnmul	vmnop	vmnsub
vmonerror	vmopt	vmor	vmpop
vmpush	vmref	vmrefbitvector	vmrefbytevector
vmrefdickey	vmrefdicvalue	vmrefdirkey	vmrefdirvalue
vmreffltvector	vmrefintvector	vmreflongvector	vmrefmatrix
vmrefnummatrix	vmrefnumvector	vmrefobjvector	vmrefpcdvector
vmrefshortvector	vmrefstring	vmrefstrkey	vmrefstrvalue
vmrefsymbol	vmreftext	vmrefvector	vmreturn
vmself	vmsend	vmset	vmsetbitvector
vmsetbytevector	vmsetdickey	vmsetdicvalue	vmsetdirkey
vmsetdirvalue	vmsetfltvector	vmsetintvector	vmsetlongvector
vmsetmatrix	vmsetnummatrix	vmsetnumvector	vmsetobjvector
vmsetpcdvector	vmsetshortvector	vmsetstring	vmsetstrkey
vmsetstrvalue	vmsetvector	vmshl	vmshr
vmsmovei	vmsub	vmsubi	vmsubn
vmtestescape	vmxor

Here are a number of links which are related to this instructions .

vmnop

vmtestescape

vmvecLoop

AIS Lambdas are designed to be write-once-run-anywhere executable objects. This is accomplished via the virtual machine concept of software Lambda execution. Lambda virtual machines are designed to be mapped onto the actual host microchip at the server location, providing faithful Lambda execution wherever the Lambda may travel on the Internet. There are currently several virtual machines operating within Analytic Information Server. The DRM virtual machine uses a Dynamically typed Register Machine model to provide portable Lambda execution from high level dynamically typed instructions all the way to super fast microchip-level register execution. The DRM virtual machine runs in emulation mode during the testing and debug phases of Lambda development, and there is an AIS Lambda debugger available for Lambdas running on this virtual machine. During the final release phases of Lambda development, DRM virtual machine Lambdas are automatically converted to the NATIVE virtual machine on the host computer, using the just-in-time compiler. The NATIVE virtual machine is a faithful machine language translation of the execution rules in the DRM virtual machine onto the actual host microchip at the server location. NATIVE virtual machine execution runs at microchip-level execution speeds.

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