vmvecLoop

 

 

Description

When evaluated, this vm instruction decrements the internal Vector processing count register, specified by the previous vmvecInitialize instruction. If the internal Vector processing count is NOT zero, this vm instruction resets the instruction pointer register, Ip, to the previous Vector Processing Initialize Label (see the vmvecInitialize instruction). Neither the Vector Processing Integer Stack nor the Floating Point Stack are reset by this instruction. There are no conversions made between different types. The initial values in the three pointer registers, the three increment registers, and the counter register are NOT altered by this instruction. This instruction may return an Error value. After the operation, the Instruction Pointer is promoted. The operation of this vm instruction is expressed in the following C expression:

The vmvecLoop instruction also increments the internal Vector Processing Pointers depending upon the value of the extents argument to the previous vmvecInitialize instruction. The possible values of the extent argument are any immediate integer value, indicating the operation to be performed, or any one of the following symbolic operators:

 

Syntax

(vmvecLoop)


Name Format AIS Types
none


 

Examples

Here are a number of links to Lambda coding examples which contain this instruction in various use cases.

s

 

Keyword Links

Here are a number of links to this instruction by related keywords.

[...under construction ]

 

Instruction Type

Here are a number of links to this instructions of this same type.

vmvecBinary vmvecInitialize vmvecLoop vmvecNumScalar
vmvecNumVector vmvecPop vmvecPopNumber vmvecPush
vmvecPushNumber vmvecSetIncrements vmvecSetPointers vmvecSwapCC
vmvecUnary

 

Argument Types

Here are a number of links which are related to this instructions .

vmnop vmtestescape vmvecLoop

 

Virtual Machine Instructions

AIS Lambdas are designed to be write-once-run-anywhere executable objects. This is accomplished via the virtual machine concept of software Lambda execution. Lambda virtual machines are designed to be mapped onto the actual host microchip at the server location, providing faithful Lambda execution wherever the Lambda may travel on the Internet. There are currently several virtual machines operating within Analytic Information Server. The DRM virtual machine uses a Dynamically typed Register Machine model to provide portable Lambda execution from high level dynamically typed instructions all the way to super fast microchip-level register execution. The DRM virtual machine runs in emulation mode during the testing and debug phases of Lambda development, and there is an AIS Lambda debugger available for Lambdas running on this virtual machine. During the final release phases of Lambda development, DRM virtual machine Lambdas are automatically converted to the NATIVE virtual machine on the host computer, using the just-in-time compiler. The NATIVE virtual machine is a faithful machine language translation of the execution rules in the DRM virtual machine onto the actual host microchip at the server location. NATIVE virtual machine execution runs at microchip-level execution speeds.

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