vmvecInitialize

 

 

Description

When evaluated, this vm instruction re-initializes the internal Vector processing registers, specified by the immediate extent argument, and resets the Vector processor count from the specified count register. Neither the Vector Processing Integer Stack nor the Floating Point Stack are reset by this instruction. This instruction sets the Vector Processing Initialize Label to the immediately following instruction. The next issued vmvecLoop instruction may jump back to the next instruction following this vmvecInitialize instruction. There are no conversions made between different types. The initial values in the three pointer registers, the three increment registers, and the counter register are NOT altered by this instruction. This instruction may return an Error value. After the operation, the Instruction Pointer is promoted. The operation of this vm instruction is expressed in the following pseudo code:

  • argument: {0} (Vector argument pointer/increment/count are re-initialized from the registers specified)
  • source: {1} (Vector argument & source pointer/increment/count are re-initialized from the registers specified)
  • target: {2} (Vector argument, source & target pointer/increment/count are re-initialized from the registers specified)

    • The valid extents arguments are any immediate integer value, indicating the operation to be performed, or any one of the following symbolic operators:

     

    Syntax

    (vmvecInitialize extent count)

    Name Format AIS Types
    extentimmediateinteger
    countregisterinteger

     

    Examples

    Here are a number of links to Lambda coding examples which contain this instruction in various use cases.

    s

     

    Keyword Links

    Here are a number of links to this instruction by related keywords.

    [...under construction ]

     

    Instruction Type

    Here are a number of links to this instructions of this same type.

    vmvecBinary vmvecInitialize vmvecLoop vmvecNumScalar
    vmvecNumVector vmvecPop vmvecPopNumber vmvecPush
    vmvecPushNumber vmvecSetIncrements vmvecSetPointers vmvecSwapCC
    vmvecUnary

     

    Argument Types

    Here are a number of links which are related to this instructions .

    vmadd vmaddi vmand vmapply
    vmargcount vmargfetch vmcadd vmcall
    vmcdiv vmcmul vmcsub vmdebugger
    vmdiv vmdivi vmdivr vmdivri
    vmiadd vmiand vmiandb vmidiv
    vmidivr vmimul vmior vmiorb
    vmisub vmixor vmixorb vmjump
    vmjumpcc vmmul vmmuli vmnatAddInteger
    vmnatAndInteger vmnatDivInteger vmnatDivrInteger vmnatJumpCCInteger
    vmnatLoadInteger vmnatLoadLong vmnatLoadShort vmnatMulInteger
    vmnatOrInteger vmnatSaveInteger vmnatSaveLong vmnatSaveShort
    vmnatShlInteger vmnatShrInteger vmnatSubInteger vmnatXorInteger
    vmopt vmor vmpop vmpush
    vmrefbitvector vmrefbytevector vmrefdickey vmrefdicvalue
    vmrefdirkey vmrefdirvalue vmreffltvector vmrefintvector
    vmreflongvector vmrefmatrix vmrefnummatrix vmrefnumvector
    vmrefobjvector vmrefpcdvector vmrefshortvector vmrefstring
    vmrefstrkey vmrefstrvalue vmrefsymbol vmreftext
    vmrefvector vmregAddImmediate vmregAddInteger vmregAddPointer
    vmregAndImmediate vmregAndInteger vmregDivImmediate vmregDivInteger
    vmregDivrImmediate vmregDivrInteger vmregIncPointer vmregInteger
    vmregJump vmregJumpCCImmediate vmregJumpCCInteger vmregLoadAddress
    vmregLoadDclType vmregLoadInteger vmregLoadJmpPointer vmregLoadTail
    vmregLoadType vmregMoveImmediate vmregMoveInteger vmregMulImmediate
    vmregMulInteger vmregObjLength vmregObjPointer vmregOrImmediate
    vmregOrInteger vmregRefCharacter vmregRefFloat vmregRefInteger
    vmregRefLong vmregRefNumber vmregRefShort vmregRefXCharacter
    vmregRefXFloat vmregRefXInteger vmregRefXLong vmregRefXNumber
    vmregRefXShort vmregRefXWord vmregRunInHarware vmregSaveDeclType
    vmregSaveDeclTypeImmediate vmregSaveInteger vmregSaveTailImmediate vmregSetCharImmediate
    vmregSetCharacter vmregSetFloat vmregSetIntImmediate vmregSetInteger
    vmregSetLong vmregSetLongImmediate vmregSetShort vmregSetShortImmediate
    vmregSetWord vmregSetXCharImmediate vmregSetXCharacter vmregSetXFloat
    vmregSetXIntImmediate vmregSetXInteger vmregSetXLong vmregSetXLongImmediate
    vmregSetXNumber vmregSetXShort vmregSetXShortImmediate vmregSetXWord
    vmregShlImmediate vmregShlInteger vmregShrImmediate vmregShrInteger
    vmregStringCompare vmregStringiCompare vmregSubImmediate vmregSubInteger
    vmregSubNumber vmregSubPointer vmregXorImmediate vmregXorInteger
    vmsend vmsetbitvector vmsetbytevector vmsetdickey
    vmsetdicvalue vmsetdirkey vmsetdirvalue vmsetfltvector
    vmsetintvector vmsetlongvector vmsetmatrix vmsetnummatrix
    vmsetnumvector vmsetobjvector vmsetpcdvector vmsetshortvector
    vmsetstring vmsetstrkey vmsetstrvalue vmsetvector
    vmshl vmshr vmsub vmsubi
    vmvecBinary vmvecInitialize vmvecNumScalar vmvecNumVector
    vmvecPop vmvecPush vmvecSetIncrements vmvecSetPointers
    vmvecSwapCC vmvecUnary vmxor

     

    Virtual Machine Instructions

    AIS Lambdas are designed to be write-once-run-anywhere executable objects. This is accomplished via the virtual machine concept of software Lambda execution. Lambda virtual machines are designed to be mapped onto the actual host microchip at the server location, providing faithful Lambda execution wherever the Lambda may travel on the Internet. There are currently several virtual machines operating within Analytic Information Server. The DRM virtual machine uses a Dynamically typed Register Machine model to provide portable Lambda execution from high level dynamically typed instructions all the way to super fast microchip-level register execution. The DRM virtual machine runs in emulation mode during the testing and debug phases of Lambda development, and there is an AIS Lambda debugger available for Lambdas running on this virtual machine. During the final release phases of Lambda development, DRM virtual machine Lambdas are automatically converted to the NATIVE virtual machine on the host computer, using the just-in-time compiler. The NATIVE virtual machine is a faithful machine language translation of the execution rules in the DRM virtual machine onto the actual host microchip at the server location. NATIVE virtual machine execution runs at microchip-level execution speeds.

    Analytic Information Server (AIS)

    AIS Component Systems

    • Smartbase Engine
    • QT C++ Libraries
    • MySQL Relational Database
    • AIS Lisp Libraries
    • Rapid Analytic Demo IDE