vmregRunInHardware
vmregRunInHardware
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When evaluated, this vm instruction either starts or stops the AIS Lisp Just-In-Time
compiler from generating all Assembler register instructions in hardware mode.
Issuing a (vmregRunInHardware start:) instruction causes as many register variables as possible,
between this (vmregRunInHardware start:) instruction, and the next (vmregRunInHardware stop:) instruction,
to be loaded into actual host hardware registers from their memory placeholder locations.
Issuing a (vmregRunInHardware stop:) instruction causes all registers, previously loaded into actual host
hardware registers to be saved back into their memory placeholder locations. In between the
(vmregRunInHardware start:) and (vmregRunInHardware stop:) instructions, the AIS Lisp compiler allows only a
very restricted set of register instructions. The Just-In-Time compiler generates all code for these register
instructions to use the actual host hardware registers. There are no conversions made between different types.
This instruction may return an Error value. After the operation, the Instruction Pointer is promoted.
The operation of this vm instruction is expressed in the following pseudo code:
Name
Format
AIS Types command immediate integer
Here are a number of links to Lambda coding examples which contain this instruction in various use cases.
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Here are a number of links to this instruction by related keywords.
[...under construction ]
Here are a number of links to this instructions of this same type.
Here are a number of links which are related to this instructions .
AIS Lambdas are designed to be write-once-run-anywhere executable objects. This is accomplished via the virtual machine concept of software Lambda execution. Lambda virtual machines are designed to be mapped onto the actual host microchip at the server location, providing faithful Lambda execution wherever the Lambda may travel on the Internet. There are currently several virtual machines operating within Analytic Information Server. The DRM virtual machine uses a Dynamically typed Register Machine model to provide portable Lambda execution from high level dynamically typed instructions all the way to super fast microchip-level register execution. The DRM virtual machine runs in emulation mode during the testing and debug phases of Lambda development, and there is an AIS Lambda debugger available for Lambdas running on this virtual machine. During the final release phases of Lambda development, DRM virtual machine Lambdas are automatically converted to the NATIVE virtual machine on the host computer, using the just-in-time compiler. The NATIVE virtual machine is a faithful machine language translation of the execution rules in the DRM virtual machine onto the actual host microchip at the server location. NATIVE virtual machine execution runs at microchip-level execution speeds.
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Analytic Information Server (AIS)AIS Component Systems
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